Photolithography or optical lithography systems used in the manufacture of integrated circuits have been around for some time. Such systems have proven extremely effective in the precise manufacturing and formation of very small details in the product. In most photolithography systems, a circuit image is written on a substrate by transferring a pattern via a light or radiation beam (e.g., UV or ultraviolet light). For example, the lithography system may include a light or radiation source that projects a circuit image through a reticle and onto a silicon wafer coated with photoresist, i.e., a material sensitive to irradiation. The exposed photoresist typically forms a pattern that after development masks the layers of the wafer during subsequent processing steps, as for example deposition and/or etching.
Two of the most important process parameters for controlling the photolithographic process are focus and exposure. Focus generally deals with clarity with which an optical subsystem of the lithography system renders an image and exposure generally deals with the amount or dosage of light (or radiation) that is used to form the pattern (such as the light produced by a light source of the lithography system). Both affect the circuit pattern in a non-trivial way. For example, changes in focus and exposure may cause changes in the resist profile, i.e., the shape of the circuit printed in the photoresist. The resist profile is often described by three parameters related to a trapezoidal approximation of the profile: the linewidth or critical dimension (CD), the sidewall angle and the height. If the resist profile changes are too great, then the final circuit may not run properly or it may not run at all. By way of example, linewidth is one factor that determines the speed and the timing across the circuit and thus changes thereto may cause one portion of the circuit to run faster or slower than another portion of the circuit (thereby reducing the selling price of the chip since the circuit is clocked to the slower portion). As should be appreciated, the quality of the resist profile is directly related to the quality of the etched or deposited features formed therethrough. In addition, changes to the resist profile may cause open or shorted circuits such that the circuit may need to be discarded or reworked.
Presently, the optimal focus and exposure settings of the lithography system are determined using a focus exposure matrix (FEM), i.e., by exposing a wafer with multiple combinations of focus and exposure, and then inspecting the resultant pattern for the best resist profiles—the resist profiles that more closely match the desired or optimal resist profiles. The inspection is generally performed by a CD scanning electron microscope (CD-SEM) that measures the CD of the resist profile. The focus-exposure matrix may be visualized using a Bossung Plot. The Bossung Plot generally plots CD vs. focus position for varying levels of exposure, i.e., the varying levels of exposure are plotted as contour lines with linewidth representing the Y axis and focus position representing the X axis of the graph. Alternatively, the Bossung Plot may plot exposure vs. focus for varying values of CD, i.e., the values of CD are plotted as contour lines with exposure representing the Y axis and focus position representing the X axis of the graph. Other resist profile parameters, for example, sidewall angle and height may also be visualized using Bossung Plots. These plots are generally harder to obtain since measuring these shapes is often a difficult endeavor. In most cases, the wafer has to be destroyed, i.e., cut through, so that these parameters can be measured. The process window of the system may be determined by plotting multiple resist profile parameters, as for example, linewidth, sidewall angle, and height in the same Bossung Plot. The process window is generally defined as the region of focus and exposure that keeps the final resist profile within prescribed specifications (e.g., process window typically includes the optimum focus and exposure).
Unfortunately, the method described above has several drawbacks. For one, the focus and exposure tests are performed periodically and thus the process may drift out of control between tests. An out of control process may lead to wafers that may need to be scrapped or reworked thus reducing yield and increasing costs. For example, these tests may be performed at 12 hr increments, 1 day increments, 1 week increments and the like. Another drawback is that the lithography system has to stop production in order to perform the tests. That is, the production run must be stopped so that a focus exposure matrix test wafer can be inserted into the system. As should be appreciated, stopping the production run reduces the throughput of the lithography system thereby increasing cycle time and cost.
Attempts to remedy these drawbacks have included using a CD-SEM to measure the CD of a pattern during a production run, and then keeping the CD within prescribed specifications using exposure dose as a manipulated variable to affect changes in CD. Although the focus may have a significant effect on CD, it is assumed in this method that focus is constant and therefore does not effect the CD. Unfortunately, however, the focus of the photolithographic system may (and often does) drift over time making the assumption of constant focus false. Accordingly, this method may not be very accurate since two variables (focus and exposure) may affect the CD rather than one. Furthermore, it should be noted that it is generally not possible to independently manipulate two variables simultaneously (e.g., both focus and exposure) due to the fact that a single measurement type, CD, is the only available test that may be routinely performed, i.e., CD-SEM is typically only capable of measuring CD (e.g., unless using tilted beam CD-SEM). Another method for monitoring focus is generically based on the phenomenon of line end shortening.
In view of the foregoing, improved techniques for determining focus and exposure settings of a photolithographic system are desired. In particular, techniques that allow the system quick feedback by measuring or monitoring production wafers or material so that process drifts may be substantially eliminated without having to stop production.